Computer Organization & Architecture Lab Manual

This site is an online English edition of the Computer Organization & Architecture Lab Manual.

It is organized as one chapter → multiple pages (one page per section), with figures/tables preserved (captions + cross references) and math rendered with KaTeX.

How to use this manual

• Use the left sidebar to browse chapters and sections.
• Use the right table of contents on each page to jump within a section.
• Follow the Experiment sections step-by-step; they are written to be performed in order.

Quick start

1. Start with Chapter 1 — Getting Started: Lab Environment & Tools.
2. Work through the chapters in order, especially if you are new to the toolchain.

Tools used in the labs

Depending on the chapter/experiment, you will typically use:

• Logisim Evolution (digital logic design & SoC-level circuits)
• Ripes (RISC-V CPU visualization and pipeline/cache experiments)
• A RISC-V bare-metal toolchain (e.g., riscv64-unknown-elf-gcc) for assembly/C experiments

Content structure

• Part 1 — Digital Logic: Chapters 1–3
• Part 2 — Processor Architecture: Chapters 4–6
• Part 3 — Memory Systems: Chapters 7–8
• Part 4 — I/O Systems: Chapter 9
• Appendices: instruction quick reference and full lab source listings

About this site

This site is generated with Astro + Starlight and maintained as a Git repository.

If you find a translation issue, a broken reference, or a formatting problem, open an issue or submit a patch in the repo.