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Mapping Strategies (Basics)

To describe a cache, common parameters include:

  • Capacity CC (bytes)
  • Block size bb (bytes per block)
  • Number of blocks B=C/bB=C/b
  • Number of sets SS
  • Associativity (ways) N=B/SN=B/S

A cache is organized as: sets → ways → lines (each line holds one block plus metadata such as valid/dirty/tag).

Different structures are essentially different choices of SS and NN:

  • Direct-mapped: N=1N=1
  • NN-way set-associative: N>1N>1
  • Fully associative: S=1S=1

In direct-mapped caches, each set has exactly one line.

Direct-mapped address partition example

Figure 8.1: Example address partitioning for a direct-mapped cache.

Direct-mapped cache structure example

Figure 8.2: Example direct-mapped cache structure (V = valid).

In an NN-way set-associative cache, a memory block maps to one set, but may occupy any way within that set. Tags for all ways in the set are compared in parallel.

2-way set-associative cache structure example

Figure 8.3: Example 2-way set-associative cache structure.

Fully associative is the extreme: S=1S=1 and N=BN=B. Any block may be placed in any line; there is no set index field.

Fully associative cache structure example

Figure 8.4: Example fully associative cache structure.